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Research Engineer - AMS Verification (remote)

Remote, USA Full-time Posted 2026-06-17
Analog/Mixed-Signal Verification Engineer Must be a US Citizen Remote / work from home Full-time/employee + Bonus, Benefits, 401k, Stock OptionsYou will work on a small, talented team responsible for developing new verification techniques to verify state-of-the-art circuits and systems, ensuring their accuracy and reliability prior to tape-outs. You will have the opportunity to contribute to all areas of AMS verification, including behavioral modeling, simulation, and mixed-signal integration. Projects range from verifying high-speed, low-noise analog circuits to ensuring the correctness of complex direct-RF digital beamforming and secure hardware systems.Responsibilities:
  • Collaborate with design teams to identify verification gaps and propose coverage-driven solutions.
  • Contribute to post-silicon validation, debugging, and characterization efforts to ensure correlation with pre-silicon verification.
  • Create behavioral models of analog and RF components in SystemVerilog, Verilog-A, Verilog-AMS, or other relevant modeling languages.
  • Define testbenches and validation plans to ensure seamless integration between analog and digital subsystems.
  • Develop and execute AMS verification methodologies for high-performance analog, mixed-signal, and RF circuits, including DACs/ADCs, PLLs, LNAs, and VGAs.
  • Perform functional and mixed-signal verification using industry-standard AMS simulation tools.
  • Stay up to date with advancements in AMS verification methodologies, tools, and semiconductor process technologies.
Skills & Experience:
  • Experience in developing advanced verification flows from the ground up
  • Experience with analog, mixed-signal, and RF circuit verification, including behavioral modeling, simulation, and validation
  • Expertise in industry-standard AMS verification tools, such as:
- Cadence Virtuoso, Spectre, and ADE-XL - Real-number emulation on the Cadence Palladium or Synopsys ZeBu platforms - VCS, Xcelium
  • PhD + research experience or BSEE/MSEE with 5+ years of relevant experience
  • Proficiency in Verilog-A, Verilog-AMS and SystemVerilog real number modeling for mixed-signal verification
DESIGN VERIFICATION GROUP on LinkedIn: https://www.linkedin.com/groups/3989573/ Apply for the job now! Apply for this job

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